Home News Press Release

News

FOR IMMEDIATE RELEASE

CONTACTS:

Interra Systems' Benchmarking of Bluespec Compiler Uncovers No Compromises in Quality of Results

Bluespec's High-Level Synthesis Generates RTL with Speed and Area Comparable to Hand-Designed RTL

WALTHAM, Mass. & SANTA CLARA, Calif., May 3, 2004
Bluespec Inc. (www.bluespec.com), developer of the industry's first high-level SystemVerilog-based Electronic Design Automation (EDA) toolset and Interra Systems (www.interrasystems.com), the leading provider of software building blocks, test suites and services, announced the completion of benchmarking that concludes Bluespec's EDA toolset enables high-level hardware synthesis with Quality of Results (QoR) better than or equivalent to hand-coded Register Transfer Level (RTL) designs.

Although the challenges of designing large-scale digital systems demand productivity and methodology enhancements from EDA toolset vendors, ASIC and FPGA engineers are reluctant to adopt approaches that also adversely impact QoR. In addition to the need for high-quality solutions providing tight interoperability with existing EDA tools, competitive market pressures require solutions that provide optimal cost and performance characteristics. Interra's certification and testing programs assist EDA solution providers and end users in evaluating quality and compliance of EDA products to meet industry expectations.

"Our comprehensive, proven and automated test suites evaluate EDA tools for quality, compliance to IEEE and evolving industry standards," said Sunil Jain, President and CEO of Interra Systems. "Vigorous benchmarking of Bluespec's toolset demonstrates that its unique approach to high-level hardware synthesis produces results highly comparable to those of hand-crafted RTL."

Testing Criteria Proves QoR
Testing of Bluespec's toolset entailed 25 small-to-medium sized designs from Interra's comprehensive IP library. These designs were re-coded at a "design assertion" level for synthesis with Bluespec and tested to ensure identical functionality to the original Verilog designs. Both the Bluespec compiler-generated and hand-designed RTL were run through equivalent RTL to netlist synthesis flows and optimized to emphasize area and timing separately. The tests disproved the conventional wisdom that for small designs engineers will achieve better results by hand than with an automated tool, by demonstrating that, even on these designs, the Bluespec toolset achieves equivalent results.

Bluespec's toolset creates a new level of abstraction for ASIC and FPGA engineers, accelerating the time to a verified netlist by as much as 50 percent and dramatically reducing verification efforts. The higher level of abstraction offers a unified design environment where designs can be architected, modeled, rapidly prototyped, and quality hardware generated.

"High-level means little if you compromise the quality of silicon produced," said Shiv Tasker, Bluespec CEO. "Interra's thorough testing assures that Bluespec will bring to market a complete, high-quality toolset that will enable design engineers to close the productivity gap between design capability and manufacturing ability."

About Interra Systems
Interra Systems, Inc. is a leading provider of highly flexible and adaptive design solutions for the acceleration of memory, ASIC, SoC and system designs. Interra's development capability includes a memory development system, EDA tool front-ends, which includes a RTL Synthesis, VHDL and Verilog analyzers and test suites. Interra offers a breadth of services for Electronic and Memory Design Automation, and for developing Digital Video applications and DSP solutions. Customers have found significant strategic value in using solutions from Interra Systems. For more information visit www.interrasystems.com.

About Bluespec
Bluespec Inc. produces an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction for hardware design while retaining the ability to automatically synthesize high quality RTL, without compromising speed, power or area. The toolset allows ASIC and FPGA designers to significantly reduce design time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found on www.bluespec.com or by calling 781-250-2200.

Copyright 2004 Bluespec, Inc. Bluespec is a trademark of Bluespec, Inc. All other brands, products, or service names may be trademarks or service marks of the companies with which they are associated.